Thin film field effect transistors (thin film transistors TFTs) are suitable for a multiplicity of applications pertaining to semiconductor electronics that require low production costs, flexible or unbreakable carrier substrates, or fabrication of transistors and integrated circuits over large areas. TFTs are formed based on organic and inorganic semiconductor materials, such as vapor-deposited organic pentacene or inorganic silicon, and are suitable, for instance, as pixel control elements in active matrix screens and optical sensors and for fabrication of extremely inexpensive integrated circuits, such as used, for instance, in the labeling and identification of merchandise and goods.
Broad field of use of TFTs, and, in particular, those based on organic semiconductor materials, is the use of the lowest possible supply voltages of less than 10 volts.
Sufficient modulation of the charge carrier density in the semiconductor body of the transistor requires a sufficiently strong electric field. Since the field strength of the electric field decreases with the thickness of the gate dielectric layer, gate dielectric layers that are as thin as possible are required for operating thin film field effect transistors at low supply voltages and thus also at low gate voltages.
On the other hand, the gate dielectric layer is intended to ensure a sufficiently good electrical insulation between the semiconductor body and the gate electrode. In the case of organic thin film field effect transistors (organic TFTs, OFETs) with a semiconductor body made of an organic material, for the case where the organic semiconductor material is applied to the gate dielectric layer, the material of the gate dielectric layer is intended to enable an optimum molecular orientation of the subsequently deposited organic semiconductor material.
For example, “High-mobility, Low Voltage Organic Thin Film Transistors,” Gundlach et al., Technical Digest—International Electron Devices Meeting (1999), p. 111, describes silicon oxide as material for a gate dielectric layer where the silicon oxide is deposited by ion beam sputtering at a substrate temperature of 80 degrees Celsius. Further, “Pentacene Thin-film Transistors with Al2O3+x Gate Dielectric Films Deposited on Indium-Tin-Oxide Glass,” Lee, et al., Applied Physics Letters, Vol. 83, No. 13 (2003), p. 2689 describes gate dielectric layers made of aluminum oxide deposited by cathode beam sputtering and without substrate heating.
Layers of inorganic dielectrics deposited at temperatures of less than approximately 200 degrees Celsius generally have a relatively high density of defects (pin holes). In order to ensure sufficiently good insulator properties despite the comparatively high defect density, it is necessary to provide gate dielectric layers made of inorganic materials in each case as relatively thick layers of more than 100 nanometers, so that comparatively high supply voltages of more than 10 volts are necessary for operation of such circuits.
“High Performance All-Polymer Integrated Circuits,” Gelinck et al., Applied Physic Letters, Vol. 77, No. 10 (2000), p. 1487, “Monolithically Integrated Flexible Display of Polymer-Dispersed Liquid Crystal Driven by Rubber-Stamped Organic Thin-Film Transistors,” Mach, et al., Applied Physics Letters, Vol. 78, No. 23, (2001), p. 3592, and “High-Mobility Polymer Gate Dielectric Pentacene Thin Film Transistors,” Klauk et al., Journal of Applied Physics, Vol. 92, No. 9. (2002), p. 5259, describe, as an alternative to inorganic gate dielectrics, insulating polymers for fabrication of organic thin film field effect transistors.
Polymers generally have the advantage that they can be processed at relatively low temperatures of below approximately 200 degrees Celsius. In a disadvantageous manner, the insulator properties of thin layers of polymeric dielectrics deteriorate on account of leakage currents, as the layer thickness decreases, to a greater extent than in the case of inorganic dielectrics. Therefore, fabricating organic field effect transistors, polymeric dielectrics are used only in the form of comparatively thick layers having a thickness of more than 100 nanometers. Integrated circuits having organic field effect transistors with polymeric gate dielectrics require the use of comparatively high supply voltages. In pentacene layers deposited on polymeric dielectrics, the mobility of the charge carriers is similar or higher in comparison with inorganic dielectrics.
Organic field effect transistors with self assembling molecular monolayers (self assembling monolayers, SAM) as gate dielectric, and synthesis methods for a compound for forming a self assembling monolayer have been described. In contrast to customary polymeric dielectrics, self assembling molecular monolayers are distinguished by very low leakage currents despite a layer thickness of a few nanometers. A specific leakage current of approximately 1 μA/cm2 results given an electric field strength of 10 MV/cm. Given a layer thickness of approximately 2 to 3 nanometers, SAM dielectrics permit the use of very low supply voltages of between 1 and 3 volts. SAM dielectrics are disadvantageously comparatively sensitive toward high voltages. If the applied voltage exceeds a value of approximately 3.5 volts, then a gate dielectric layer with an SAM dielectric may already be irreversibly damaged (dielectric breakdown).
“Improved Organic Thin Film Transistor Performance Using Chemically-Modified Gate Dielectrics,” Gundlach et al., Organic Field Effect Transistors—Proceedings of SPIE, Vol. 4466, (2001), pp. 54-64 describes a molecular monolayer made of octadecyltrichlorosilane (OTS) as an interface layer between an inorganic gate dielectric layer and an organic semiconductor layer subsequently deposited on the gate dielectric layer. The interface layer adapts the surface properties of the gate dielectric layer made of the inorganic dielectric to the semiconductor material in a targeted manner, thereby obtaining an optimum molecular orientation in the organic semiconductor layer. An optimum molecular orientation in the organic semiconductor layer ensures a high mobility of the charge carriers in the semiconductor. The defect density in the inorganic gate dielectric layer remains unaffected by this in the case of processing below 200 degrees Celsius, thus resulting, in this case as well, in the need for a comparatively thick gate dielectric layer made of the inorganic dielectric. Such an arrangement of a monolayer on a dielectric layer influences the semiconductor orientation in the semiconductor material, but not the supply voltage of the thin film field effect transistor.
Providing a thin film field effect transistor is processed at process temperatures of below approximately 200 degrees Celsius enables the use of supply voltages of less than approximately 5 volts and is robust toward voltages at the electrodes of up to approximately 20 volts. A method for fabricating such a thin film field effect transistor is desirable.